Program
I Sliced My SIEM: Finally Getting Value out of Your SIEM!
SIEM history is linked to the evolution of the security industry. It has been designed initially to manage NIDS noise and then evolved to a correlation platform where outcomes of penetration test reports can be encoded. A couple of years ago, PCI-DSS and other regulations required "log analysis" to check the compliance box and companies matured in security incident response and forensics. SIEM was the natural answer for those needs. That lead many companies to invest (heavily) into SIEM technologies.
Nowadays when you talk to executives about SIEM the most common word used is "disappointment". It represents a lot of money and benefit is very low. This talk is about sharing experienced processes that can help any organization to get value out of the SIEM. It is NOT about new "shiny tools" or "easy tricks" that will increase the bill, but test proofed manageable processes that will help you to get the most out of your SIEM.
Keywords: SIEM, Blue Team, Efficiency, Streamline
Speaker
Emmanuel JeantheauEmmanuel is an IT Security Enthusiast (SABSA & CISSP & ISO27001 & GCIH & GMON certified) with more than 10 years experience in this field, currently working for a cloud and security services provider. He is leading many security capabilities: Security Threat Monitoring, Threat Hunting, Security Incident Response and Active Defense. He is recognized by his peers for having a good mix of soft-skills and technical competencies. Before working in the Cloud Industry, Emmanuel worked for diverse industries - France Diplomacy; Decathlon (Sports retail); Société Générale & BNP Paribas (banks); Airbus (Aircraft Manufacturer) - He also owns of two master’s degrees (Security Telecommunication & Business Management). Emmanuel is always eager to connect with other IT Security Experts and hearing from former colleagues, managers, or just security creative folks, so do not hesitate to come to him to exchange about security topics! |
Weaponizing Layer 8
Do you think users are the weakest link in the security chain? Here is some duct tape to change that, and to raise the bar for social engineers and other attackers alike.
From PEBKAC to ID-Ten-T we have been calling them names and didn't want them on our networks. This way of destructive thinking needs an overhaul, and here are some easy tricks on how users can become the valuable asset in corporate security that indeed they should be. Finding creative solutions to existing problems have been a standard skill for red teamers, whereas those defending networks often rely on standards.
Discover some creative solutions people have come up with to significantly raise their security - most of them are easy to implement - and how users can become a major asset of any security team.
Keywords: Creative Defense, Anti-phishing, Blue Team
Speaker
Stefan HagerStefan works for the Internet Security Team at German company DATEV eG. Having started with computers and starting to be puzzled by reality in the 80s, he started out as a programmer in the early 90s. Since 2000 he has been securing networks and computers for various enterprises in Germany and Scotland. His main focus nowadays is raising security awareness, coming up with creative solutions to security problems and discussing new ideas concerning threat mitigation. When not trying to do any of the stuff mentioned above, he is either travelling, procrastinating or trying to beat some hacking challenge. Stefan also writes blog posts (in English and German) on his site https://cyberstuff.org. |
Building a Personal Data Focused Incident Response Plan to Address Breach Notification
The era of the data breach is upon us. In a traditional incident response investigation, the focus is often on attribution and how it was done, with an aim of quickly containing. Change needs to occur and organisations need to be able to quickly identify and understand what personal data is affected. Using the SANS six primary phases of incident response as a base, this talk will explore practical steps to rebuild the incident response plan with a personal data focus. By using and understanding Information Asset registries, data mappings and data protection impact assessments, the preparation phase can be enhanced to support personal data protection coverage in the IR plan. The goal to engage ideas and thoughts on how to improve the identification phase where detection and determination need to quickly identifies an event and subsequent incident where a potential personal data breach is occurring.
Keywords: Incident Response, Data Breach, Personal Data
Speaker
Thomas FischerThomas has over 30 years of experience in the IT industry ranging from software development to infrastructure & network operations and architecture to settle in information security. He has an extensive security background covering roles from incident responder to security architect at fortune 500 companies, vendors and consulting organisations. He is currently a security advocate and threat researcher focused on advising companies on understanding their data protection activities against malicious parties not just for external threats but also compliance instigated. Thomas is also an active participant in the InfoSec community not only as a member but also as director of Security BSides London, ISSA UK chapter board member and speaker at events like SANS DFIR EMEA, DeepSec, Shmoocon, and various BSides events. |
(Amplification) Attack of the Clones
This talk looks at DOS and DDOS Attacks and how to mitigate them. Surveying how similar techniques of attack are cloned across different protocols, with different mitigating defence mechanisms that may be applied.
Consideration will be given to mitigate (D)DOS from old school Smurf and Fraggle, through newer DNS, NTP, SNMP reflection and amplification attacks. Moving up the stack to layer 7, to discuss the mitigation techniques to deal with various HTTP flood types of attack.
With Script kiddies using tools like RUDY, Slowloris, and various orbital ion cannons then clear strategies to defend against these threats are required. With botnets weaponised with various DOS munitions, along with the rise of Booters offering DDOS As A Service; it becomes essential to understand the tools and strategies required to survive the threat.
Keywords: DDOS mitigation, DDOS defence, Amplification Attack Prevention
Speaker
Beverley MacKenzieBeverley has over 20 years’ experience working across many disciplines including Information Security, Audit, UNIX systems administration, Finance and Accounting. She is currently a Research Fellow at Abertay University, where in addition to teaching, she is working towards obtaining a Ph.D around Blockchain for the Internet of Things. |
Speaker
Scott MacKenzieScott is currently contracted as a Senior IT Security Specialist to a global bank in Zürich working on the banks global Secure Key Management, PKI and cryptography systems. He has 22 years working in engineering, solutions, infrastructure, and enterprise security architecture. |
Androzoo APK Search: A Search Service of Meta-Data Related to Android Malware
We introduce Androzoo APK Search, an online service for querying structural information extracted from Android malware. The service is supported by an ElasticSearch cluster which can be leveraged by security experts to access a broad set of meta-data, including developer certificate information, source code elements, manifest information and antivirus labels collected for 1 million malicious applications. Androzoo APK Search can be accessed through a REST API and integrated with external projects via any HTTP clients.
Compared to other platforms, our solution supports a fast access model for retrieving the list of applications which match a specific feature (e.g., call to a given method name). Thus, our system enables the community to track indicators of compromise related to Android malware. With more than 900 fields extracted through static analysis, experts can also exploit the meta-data that we provide to devise better detection systems and prevent the propagation of malicious samples. Finally, Androzoo APK Search can be used to compute analytical metrics and create a baseline for the characterization and the classification of malware families.
Keywords: Android, Malware, Analysis, Online, Service
Resources: Talk
Speaker
Médéric HurierMédéric works on Android Security, Big Data, Machine Learning, and Malware Analysis. He is a Ph.D. Student and Teacher Assistant at the University of Luxembourg. |
Lessons Learned from the Verizon Data Breach Investigation Report
You've heard about it, you've seen it cited, you may have even printed it, but have you actually read the Verizon Data Breach Investigation Report (VDBIR) in its entirety? If not, no worries! While the experience of curling up with a nice libation and the scintillating 70 pages of the VDBIR is quite enticing, come, hear a distilled version. Learn about the latest attack vectors, who the current cast of malicious actors are, and discover how to bolster your security posture against today's threat landscape. From human to technical exploits, internal to external agents, acquire the knowledge that's necessary to defend yourself against the threats that matter most.
Keywords: Blue Team; Defense; Threat Intelligence
Resources: Talk
Speaker
Walter AbesonWalter Abeson is currently a Systems Engineer with RSA NetWitness, focusing on digital forensics, incident response, and threat hunting. Walter thrives at detecting anomalous behavior in both endpoint and network environments. Prior to joining RSA, Walter was the Technology Manager for Black Hat, responsible for the NOC and overall security posture. Walter continues to serve as staff for the Black Hat NOC and is also a goon at DEF CON. When not behind a computer, Walter enjoys photography, reading, and spending time outdoors. |
The Artificial Reality of Cyber Defense
Security threats are growing faster than security teams and budgets while there is a huge talent shortage in security. The proliferation of data from dozens of security products in complex environments is paradoxically making it harder, not easier, for teams to detect and investigate threats.
Attackers already have an unfair advantage over the defenders in cyber-attacks, it's time for security strategies to leverage automation in detection and mitigation, restore the balance and increase our chances to come out on top in the war against cyber threats. This presentation will discuss the different options in automating the detection and mitigation of attacks, from traditional machine learning to advanced deep learning systems, their challenges, and applications, and where they fit in a modern cybersecurity strategy.
Keywords: AI, Machine Learning, Deep Learning, Cyber Security, Anomaly Detection, Automation
Speaker
Pascal GeenensAs the EMEA Cyber Security Evangelist for Radware, Pascal is a recognized Cyber Security and Emerging Technology thought leader with 20+ years of experience in Information Technology. While executing Radware’s thought leadership on today’s security threat landscape, Pascal leads the research efforts on IoT botnets and discovered BrickerBot and JenX botnets. Pascal holds a degree in Civil Engineering from the Free University of Brussels. Prior to Radware, Pascal was a consulting engineer for Juniper working with the largest EMEA cloud and service providers on their SDN/NFV and data center automation strategies. |
Automated, Generic System Call Hooking, and Interpretation
When doing malware analysis, monitoring application behavior plays an essential role. To do that, one of our most used mechanisms is system call monitoring. In contrast to approaches that e.g. put breakpoints into mapped libraries, we employ a VM monitor approach that catches the SYSCALL instruction itself. When interrupting processes on such instructions, what syscall did they actually attempt to use and what do the parameters mean, as it’s all encoded in CPU registers or the stack? In order to solve that problem in the most elegant way for our users, we needed a library of signatures of all syscalls along with the data structure types and formats they use. We automated the process of harvesting system calls and data structure definitions from multiple public open-source sources and preprocessing them to produce a single data source in machine-readable form. We present the results that we keep OSS to share with the community, and demonstrate how this improves the analyst workflow.
Keywords: Process Monitoring, Virtualization, System Calls, System Call Signatures, Automation, Open Source
Speaker
Markus PartheymüllerMarkus has been working with the Intel x86 architecture and virtualization technology since his college days. After working at Intel Labs and FireEye, he co-founded the Cybersecurity startup Cyberus Technology, where he is one of the core developers of their own secure virtualization technology stack. Markus is interested in making malware analysis simpler by combining analysis tools with the power of virtualization technology in ways that are simple to use and easy to automate. He is also an open source enthusiast. He received his Diploma in Computer Science at TU Dresden, Germany. |
Bring Your Own Python Security Tool
Didier Stevens, seasoned developer of security tools, will show you the basics of Python security tools and the concepts behind his tools. You are invited to bring your own Python security tools, to be debugged/adapted/improved during this workshop.
Keywords: Python, Tools, Security
Resources: Slides
Speaker
Didier StevensDidier Stevens (Microsoft MVP, SANS ISC Handler, Wireshark Certified Network Analyst, CISSP, GSSP-C, GCIA, GREM, MCSD .NET, MCSE/Security, MCITP Windows Server 2008, RHCT, CCNP Security, OSWP) is a Senior Analyst (NVISO). Didier is a pioneer in malicious PDF document research and malicious MS Office documents analysis and has developed several tools to help with the analysis of malicious documents like PDF and MS Office files. You can find his open source security tools on his IT security related blog. |
AppArmor for Beginners
In this workshop, we are going to explore how AppArmor can be used to sandbox processes on Linux in practice in order to limit attack surfaces and mitigate post-exploitation scenarios. There will be a short theoretical introduction after which we will cover the following practical tasks and topics:
- Checking AppArmor status and related kernel parameters
- Loading AppArmor and policies at boot time
- Checking the security context of running processes
- Creating AppArmor profiles using automated tools (aa-autodep, aa-genprof, aa-logprof, etc.)
- Basics of the AppArmor profile language
- Understanding and using common profile abstractions (/etc/apparmor.d/abstractions)
- Inspecting and interpreting AppArmor logs (for debugging and monitoring)
- Basic profile management tasks and utilities (aa-enforce, aa-complain, aa-disable, apparmor_parser, etc.)
After completing these smaller exercises, we are going to write a profile for a Python web application that uses a vulnerable third-party CLI (ImageMagick/convert) tool. We will see how we can use AppArmor to immunize our web application to certain vulnerabilities in third-party components and inside the web service itself.
We are going to learn how the AppArmor userspace API (aa_change_profile and aa_change_hat) can be used to implement privilege separation, further improving the security of our application.
Assumed background knowledge: basic understanding of Linux and system calls, basic literacy in C and Python
Required tools: Oracle VirtualBox and Hashicorp Vagrant.
The Vagrant box for the workshop will be available for download here (from 15 October). If you can, please download it in advance. Latest versions of both Vagrant and VirtualBox are suggested.
Keywords: AppArmor, Linux, MAC, LSM, Python
Resources: Slides
Speaker
György DemarcsekGyörgy Demarcsek currently works as a security engineer at IBM Budapest Lab (previously Ustream). Previously, he worked in the same position at Prezi.com and as a technical student at CERN. He enjoys working in the intersection of software engineering and IT security and he likes fiddling with OS-level vulnerabilities and mitigations, especially interested in sandboxing technologies. |
A Deep Dive in Osquery
We will see how Osquery works, and how to use it to protect your environment. During the workshop, we will demonstrate how to collect and track down IOCs in an investigation scenario from processes running without a binary on disk to Yara rules integration. By the end of the workshop, you will understand how to deploy Osquery on a global scale, and how to integrate the right plugins and community projects.
Keywords: Osquery, Endpoint Protection, Endpoint Incident Response, Automation
Resources: Slides
Speaker
Fabio NigiFabio Nigi is building a CSIRT for a major Belgian engineering company, and he is a former security investigator at Cisco CSIRT. During and after his engineering degree in Computer Science, Fabio focused on Ethical Hacking, spent 10 years researching, analyzing and solving ICT Governance, Risk, Compliance, Information Security and Privacy issues as subject matter expert in enterprise environments. |
Threat Hunting with OSSEC
OSSEC is sometimes described as a low-cost log management solution but it has many interesting features which, when combined with external sources of information, may help in hunting for suspicious activity occurring on your servers and end-points. During this workshop, you will learn the basic of OSSEC and its components, how to deploy it and quickly get results. Then I will demonstrate how to deploy specific rules to catch suspicious activities. From an input point of view, we will see how easy it is to learn new log formats to increase the detection scope and, from an output point of view, how we can generate alerts by interconnecting OSSEC with other tools like TheHive or an Elastic Stack/Splunk/etc.
Keywords: OSSEC, Logs, Threat Hunting, Security, Integration
Resources: Slides
Speaker
Xavier MertensXavier Mertens is a freelance cybersecurity consultant based in Belgium. His daily job focuses on protecting his customer’s assets by applying “offensive” (penetration testing) as well as “defensive” security (incident handling, forensics, log management, SIEM, security visualization, OSINT). Besides his daily job, Xavier is also a security blogger (https://blog.rootshell.be), a SANS Internet Storm Center handler (https://isc.sans.org) and co-organizer of the BruCON (http://www.brucon.org) security conference. |


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Get Social Counts Example
If you're tired of using the built-in styles of Facebook, Twitter, Google+, and StumbleUpon's like and share buttons, you're not alone. Here's how we implemented them here on Medialoot.com using PHP and jQuery. You may want to be familiar with HTML, CSS, and javascript to complete this tutorial. Read the full tutorial here…


About Us
Who We Are
Remarkable platform founded in 2020, We are independent platform that specialized in delivering professional services in organizing people's meetings for great purpose to the public by a team of mature,professional and energetic people.
Our Mission
We dedicate our efforts and excellence in providing free and affordable services in the commitment of organizing people's meetings for a great purpose such as one by one and seminars for couples to have an open talk about our society's problems.
Our vision
We are committed as Remarkable platform to deliver on time excellent free and always affordable services to all our clients in any circumstances of climate or any else we can,we are and always be honored to serve everyone in an equal way as long as we are building a great future society and families welfare.
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We as Remarkable platform are committed to make meeting bookings for you in order to make it on time and professionally by having a nice meeting place for you and your chosen one.
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We dedicate our efforts and excellence in providing privacy protection to all our clients such as protecting your names,contacts,id and your address in order to have your own choice in providing yourself all those informations to the one you have got as your choice to talk to.
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We are and always committed to organize different couple's Seminars just to have an open talk about couple's issues,questions and teaching conclusions by providing ourselves with cabinet to receive one couple by one to solve their private issues.


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Dear Sir/ Madam , I , Representing Mr. Mikhail Khodorkovsky (M.K.) would like to ask for your partnership in Re-profiling funds over US$423 million. I will give the details, but in summary, the funds are coming via bank Menatep, Gibraltar and this is a legitimate transaction. You will be paid 4% for your "management fees".
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Syntax:
- number => negation
- minuend &rest subtrahends+ => difference
Arguments and Values:
number, minuend, subtrahend---a number.
negation, difference---a number.
Description:
The function - performs arithmetic subtraction and negation.
If only one number is supplied, the negation of that number is returned.
If more than one argument is given, it subtracts all of the subtrahends from the minuend and returns the result.
The function - performs necessary type conversions.
Examples:
(- 55.55) => -55.55 (- #c(3 -5)) => #C(-3 5) (- 0) => 0 (eql (- 0.0) -0.0) => true (- #c(100 45) #c(0 45)) => 100 (- 10 1 2 3 4) => 0
Affected By: None.
Exceptional Situations:
Might signal type-error if some argument is not a number. Might signal arithmetic-error.
See Also:
Section 12.1.1 (Numeric Operations), Section 12.1.3 (Rational Computations), Section 12.1.4 (Floating-point Computations), Section 12.1.5 (Complex Computations)
Notes: None.


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Vortex (Original mix)
Rei Bala & Danilo Farias
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Jay Hardway
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| EventName | Description |
|---|---|
| INST_RETIRED.ANY | Instructions retired from execution. |
| CPU_CLK_UNHALTED.THREAD | Core cycles when the thread is not in halt state. |
| CPU_CLK_UNHALTED.REF_TSC | Reference cycles when the core is not in halt state. |
| LD_BLOCKS.STORE_FORWARD | Loads blocked by overlapping with store buffer that cannot be forwarded. |
| LD_BLOCKS.NO_SR | The number of times that split load operations are temporarily blocked because all resources for handling the split accesses are in use. |
| MISALIGN_MEM_REF.LOADS | Speculative cache-line split load uops dispatched to L1D. |
| MISALIGN_MEM_REF.STORES | Speculative cache-line split Store-address uops dispatched to L1D. |
| LD_BLOCKS_PARTIAL.ADDRESS_ALIAS | False dependencies in MOB due to partial compare on address. |
| DTLB_LOAD_MISSES.LARGE_PAGE_WALK_COMPLETED | Page walk for a large page completed for Demand load. |
| INT_MISC.RECOVERY_CYCLES | Number of cycles waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc.) |
| INT_MISC.RECOVERY_STALLS_COUNT | Number of occurences waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc.) |
| UOPS_ISSUED.ANY | Increments each cycle the # of Uops issued by the RAT to RS. Set Cmask = 1, Inv = 1, Any= 1to count stalled cycles of this core. |
| UOPS_ISSUED.STALL_CYCLES | Cycles when Resource Allocation Table (RAT) does not issue Uops to Reservation Station (RS) for the thread. |
| UOPS_ISSUED.CORE_STALL_CYCLES | Cycles when Resource Allocation Table (RAT) does not issue Uops to Reservation Station (RS) for all threads. |
| UOPS_ISSUED.FLAGS_MERGE | Number of flags-merge uops allocated. Such uops adds delay. |
| UOPS_ISSUED.SLOW_LEA | Number of slow LEA or similar uops allocated. Such uop has 3 sources (e.g. 2 sources + immediate) regardless if as a result of LEA instruction or not. |
| UOPS_ISSUED.SINGLE_MUL | Number of multiply packed/scalar single precision uops allocated. |
| FP_COMP_OPS_EXE.X87 | Counts number of X87 uops executed. |
| FP_COMP_OPS_EXE.SSE_PACKED_DOUBLE | Number of SSE* or AVX-128 FP Computational packed double-precision uops issued this cycle. |
| FP_COMP_OPS_EXE.SSE_SCALAR_SINGLE | Number of SSE* or AVX-128 FP Computational scalar single-precision uops issued this cycle. |
| FP_COMP_OPS_EXE.SSE_PACKED_SINGLE | Number of SSE* or AVX-128 FP Computational packed single-precision uops issued this cycle. |
| FP_COMP_OPS_EXE.SSE_SCALAR_DOUBLE | Counts number of SSE* or AVX-128 double precision FP scalar uops executed. |
| SIMD_FP_256.PACKED_SINGLE | Counts 256-bit packed single-precision floating-point instructions. |
| SIMD_FP_256.PACKED_DOUBLE | Counts 256-bit packed double-precision floating-point instructions. |
| ARITH.FPU_DIV_ACTIVE | Cycles that the divider is active, includes INT and FP. Set 'edge =1, cmask=1' to count the number of divides. |
| ARITH.FPU_DIV | Divide operations executed. |
| L2_RQSTS.DEMAND_DATA_RD_HIT | Demand Data Read requests that hit L2 cache. |
| L2_RQSTS.RFO_HIT | RFO requests that hit L2 cache. |
| L2_RQSTS.RFO_MISS | Counts the number of store RFO requests that miss the L2 cache. |
| L2_RQSTS.CODE_RD_HIT | Number of instruction fetches that hit the L2 cache. |
| L2_RQSTS.CODE_RD_MISS | Number of instruction fetches that missed the L2 cache. |
| L2_RQSTS.PF_HIT | Counts all L2 HW prefetcher requests that hit L2. |
| L2_RQSTS.PF_MISS | Counts all L2 HW prefetcher requests that missed L2. |
| L2_RQSTS.ALL_DEMAND_DATA_RD | Counts any demand and L1 HW prefetch data load requests to L2. |
| L2_RQSTS.ALL_RFO | Counts all L2 store RFO requests. |
| L2_RQSTS.ALL_CODE_RD | Counts all L2 code requests. |
| L2_RQSTS.ALL_PF | Counts all L2 HW prefetcher requests. |
| L2_STORE_LOCK_RQSTS.MISS | RFOs that miss cache lines. |
| L2_STORE_LOCK_RQSTS.HIT_M | RFOs that hit cache lines in M state. |
| L2_STORE_LOCK_RQSTS.ALL | RFOs that access cache lines in any state. |
| L2_L1D_WB_RQSTS.MISS | Not rejected writebacks that missed LLC. |
| L2_L1D_WB_RQSTS.HIT_E | Not rejected writebacks from L1D to L2 cache lines in E state. |
| L2_L1D_WB_RQSTS.HIT_M | Not rejected writebacks from L1D to L2 cache lines in M state. |
| L2_L1D_WB_RQSTS.ALL | Not rejected writebacks from L1D to L2 cache lines in any state. |
| LONGEST_LAT_CACHE.MISS | This event counts each cache miss condition for references to the last level cache. |
| LONGEST_LAT_CACHE.REFERENCE | This event counts requests originating from the core that reference a cache line in the last level cache. |
| CPU_CLK_UNHALTED.THREAD_P | Counts the number of thread cycles while the thread is not in a halt state. The thread enters the halt state when it is running the HLT instruction. The core frequency may change from time to time due to power or thermal throttling. |
| CPU_CLK_THREAD_UNHALTED.REF_XCLK | Increments at the frequency of XCLK (100 MHz) when not halted. |
| CPU_CLK_THREAD_UNHALTED.ONE_THREAD_ACTIVE | Count XClk pulses when this thread is unhalted and the other is halted. |
| L1D_PEND_MISS.PENDING | Increments the number of outstanding L1D misses every cycle. Set Cmask = 1 and Edge =1 to count occurrences. |
| L1D_PEND_MISS.PENDING_CYCLES | Cycles with L1D load Misses outstanding. |
| DTLB_STORE_MISSES.MISS_CAUSES_A_WALK | Miss in all TLB levels causes a page walk of any page size (4K/2M/4M/1G). |
| DTLB_STORE_MISSES.WALK_COMPLETED | Miss in all TLB levels causes a page walk that completes of any page size (4K/2M/4M/1G). |
| DTLB_STORE_MISSES.WALK_DURATION | Cycles PMH is busy with this walk. |
| DTLB_STORE_MISSES.STLB_HIT | Store operations that miss the first TLB level but hit the second and do not cause page walks. |
| LOAD_HIT_PRE.SW_PF | Non-SW-prefetch load dispatches that hit fill buffer allocated for S/W prefetch. |
| LOAD_HIT_PRE.HW_PF | Non-SW-prefetch load dispatches that hit fill buffer allocated for H/W prefetch. |
| EPT.WALK_CYCLES | Cycle count for an Extended Page table walk. The Extended Page Directory cache is used by Virtual Machine operating systems while the guest operating systems use the standard TLB caches. |
| L1D.REPLACEMENT | Counts the number of lines brought into the L1 data cache. |
| MOVE_ELIMINATION.INT_NOT_ELIMINATED | Number of integer Move Elimination candidate uops that were not eliminated. |
| MOVE_ELIMINATION.SIMD_NOT_ELIMINATED | Number of SIMD Move Elimination candidate uops that were not eliminated. |
| MOVE_ELIMINATION.INT_ELIMINATED | Number of integer Move Elimination candidate uops that were eliminated. |
| MOVE_ELIMINATION.SIMD_ELIMINATED | Number of SIMD Move Elimination candidate uops that were eliminated. |
| CPL_CYCLES.RING0 | Unhalted core cycles when the thread is in ring 0. |
| CPL_CYCLES.RING123 | Unhalted core cycles when the thread is not in ring 0. |
| CPL_CYCLES.RING0_TRANS | Number of intervals between processor halts while thread is in ring 0. |
| RS_EVENTS.EMPTY_CYCLES | Cycles the RS is empty for the thread. |
| DTLB_LOAD_MISSES.STLB_HIT | Counts load operations that missed 1st level DTLB but hit the 2nd level. |
| OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD | Offcore outstanding Demand Data Read transactions in SQ to uncore. Set Cmask=1 to count cycles. |
| OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CODE_RD | Offcore outstanding Demand Code Read transactions in SQ to uncore. Set Cmask=1 to count cycles. |
| OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO | Offcore outstanding RFO store transactions in SQ to uncore. Set Cmask=1 to count cycles. |
| OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD | Offcore outstanding cacheable data read transactions in SQ to uncore. Set Cmask=1 to count cycles. |
| OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_DATA_RD | Cycles when offcore outstanding Demand Data Read transactions are present in SuperQueue (SQ), queue to uncore. |
| OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD | Cycles when offcore outstanding cacheable Core Data Read transactions are present in SuperQueue (SQ), queue to uncore. |
| OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_CODE_RD | Offcore outstanding code reads transactions in SuperQueue (SQ), queue to uncore, every cycle. |
| OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_RFO | Offcore outstanding demand rfo reads transactions in SuperQueue (SQ), queue to uncore, every cycle. |
| LOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATION | Cycles in which the L1D and L2 are locked, due to a UC lock or split lock. |
| LOCK_CYCLES.CACHE_LOCK_DURATION | Cycles in which the L1D is locked. |
| IDQ.EMPTY | Counts cycles the IDQ is empty. |
| IDQ.MITE_UOPS | Increment each cycle # of uops delivered to IDQ from MITE path. Set Cmask = 1 to count cycles. |
| IDQ.DSB_UOPS | Increment each cycle. # of uops delivered to IDQ from DSB path. Set Cmask = 1 to count cycles. |
| IDQ.MS_DSB_UOPS | Increment each cycle # of uops delivered to IDQ when MS_busy by DSB. Set Cmask = 1 to count cycles. Add Edge=1 to count # of delivery. |
| IDQ.MS_MITE_UOPS | Increment each cycle # of uops delivered to IDQ when MS_busy by MITE. Set Cmask = 1 to count cycles. |
| IDQ.MS_UOPS | Increment each cycle # of uops delivered to IDQ from MS by either DSB or MITE. Set Cmask = 1 to count cycles. |
| IDQ.MS_CYCLES | Cycles when uops are being delivered to Instruction Decode Queue (IDQ) while Microcode Sequenser (MS) is busy. |
| IDQ.MITE_CYCLES | Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from MITE path. |
| IDQ.DSB_CYCLES | Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from Decode Stream Buffer (DSB) path. |
| IDQ.MS_DSB_CYCLES | Cycles when uops initiated by Decode Stream Buffer (DSB) are being delivered to Instruction Decode Queue (IDQ) while Microcode Sequenser (MS) is busy. |
| IDQ.MS_DSB_OCCUR | Deliveries to Instruction Decode Queue (IDQ) initiated by Decode Stream Buffer (DSB) while Microcode Sequenser (MS) is busy. |
| IDQ.ALL_DSB_CYCLES_4_UOPS | Counts cycles DSB is delivered four uops. Set Cmask = 4. |
| IDQ.ALL_DSB_CYCLES_ANY_UOPS | Counts cycles DSB is delivered at least one uops. Set Cmask = 1. |
| IDQ.ALL_MITE_CYCLES_4_UOPS | Counts cycles MITE is delivered four uops. Set Cmask = 4. |
| IDQ.ALL_MITE_CYCLES_ANY_UOPS | Counts cycles MITE is delivered at least one uops. Set Cmask = 1. |
| IDQ.MITE_ALL_UOPS | Number of uops delivered to IDQ from any path. |
| ICACHE.HIT | Number of Instruction Cache, Streaming Buffer and Victim Cache Reads. both cacheable and noncacheable, including UC fetches. |
| ICACHE.MISSES | Number of Instruction Cache, Streaming Buffer and Victim Cache Misses. Includes UC accesses. |
| ICACHE.IFETCH_STALL | Cycles where a code-fetch stalled due to L1 instruction-cache miss or an iTLB miss. |
| ITLB_MISSES.MISS_CAUSES_A_WALK | Misses in all ITLB levels that cause page walks. |
| ITLB_MISSES.WALK_COMPLETED | Misses in all ITLB levels that cause completed page walks. |
| ITLB_MISSES.WALK_DURATION | Cycle PMH is busy with a walk. |
| ITLB_MISSES.STLB_HIT | Number of cache load STLB hits. No page walk. |
| ITLB_MISSES.LARGE_PAGE_WALK_COMPLETED | Completed page walks in ITLB due to STLB load misses for large pages. |
| ILD_STALL.LCP | Stalls caused by changing prefix length of the instruction. |
| ILD_STALL.IQ_FULL | Stall cycles due to IQ is full. |
| BR_INST_EXEC.NONTAKEN_CONDITIONAL | Not taken macro-conditional branches. |
| BR_INST_EXEC.TAKEN_CONDITIONAL | Taken speculative and retired macro-conditional branches. |
| BR_INST_EXEC.TAKEN_DIRECT_JUMP | Taken speculative and retired macro-conditional branch instructions excluding calls and indirects. |
| BR_INST_EXEC.TAKEN_INDIRECT_JUMP_NON_CALL_RET | Taken speculative and retired indirect branches excluding calls and returns. |
| BR_INST_EXEC.TAKEN_INDIRECT_NEAR_RETURN | Taken speculative and retired indirect branches with return mnemonic. |
| BR_INST_EXEC.TAKEN_DIRECT_NEAR_CALL | Taken speculative and retired direct near calls. |
| BR_INST_EXEC.TAKEN_INDIRECT_NEAR_CALL | Taken speculative and retired indirect calls. |
| BR_INST_EXEC.ALL_CONDITIONAL | Speculative and retired macro-conditional branches. |
| BR_INST_EXEC.ALL_DIRECT_JMP | Speculative and retired macro-unconditional branches excluding calls and indirects. |
| BR_INST_EXEC.ALL_INDIRECT_JUMP_NON_CALL_RET | Speculative and retired indirect branches excluding calls and returns. |
| BR_INST_EXEC.ALL_INDIRECT_NEAR_RETURN | Speculative and retired indirect return branches. |
| BR_INST_EXEC.ALL_DIRECT_NEAR_CALL | Speculative and retired direct near calls. |
| BR_INST_EXEC.ALL_BRANCHES | Counts all near executed branches (not necessarily retired). |
| BR_MISP_EXEC.NONTAKEN_CONDITIONAL | Not taken speculative and retired mispredicted macro conditional branches. |
| BR_MISP_EXEC.TAKEN_CONDITIONAL | Taken speculative and retired mispredicted macro conditional branches. |
| BR_MISP_EXEC.TAKEN_INDIRECT_JUMP_NON_CALL_RET | Taken speculative and retired mispredicted indirect branches excluding calls and returns. |
| BR_MISP_EXEC.TAKEN_RETURN_NEAR | Taken speculative and retired mispredicted indirect branches with return mnemonic. |
| BR_MISP_EXEC.TAKEN_INDIRECT_NEAR_CALL | Taken speculative and retired mispredicted indirect calls. |
| BR_MISP_EXEC.ALL_CONDITIONAL | Speculative and retired mispredicted macro conditional branches. |
| BR_MISP_EXEC.ALL_INDIRECT_JUMP_NON_CALL_RET | Mispredicted indirect branches excluding calls and returns. |
| BR_MISP_EXEC.ALL_BRANCHES | Counts all near executed branches (not necessarily retired). |
| IDQ_UOPS_NOT_DELIVERED.CORE | Count issue pipeline slots where no uop was delivered from the front end to the back end when there is no back-end stall. |
| IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE | Cycles per thread when 4 or more uops are not delivered to Resource Allocation Table (RAT) when backend of the machine is not stalled. |
| IDQ_UOPS_NOT_DELIVERED.CYCLES_LE_1_UOP_DELIV.CORE | Cycles per thread when 3 or more uops are not delivered to Resource Allocation Table (RAT) when backend of the machine is not stalled. |
| IDQ_UOPS_NOT_DELIVERED.CYCLES_LE_2_UOP_DELIV.CORE | Cycles with less than 2 uops delivered by the front end. |
| IDQ_UOPS_NOT_DELIVERED.CYCLES_LE_3_UOP_DELIV.CORE | Cycles with less than 3 uops delivered by the front end. |
| IDQ_UOPS_NOT_DELIVERED.CYCLES_FE_WAS_OK | Counts cycles FE delivered 4 uops or Resource Allocation Table (RAT) was stalling FE. |
| UOPS_DISPATCHED_PORT.PORT_0 | Cycles which a Uop is dispatched on port 0. |
| UOPS_DISPATCHED_PORT.PORT_1 | Cycles which a Uop is dispatched on port 1. |
| UOPS_DISPATCHED_PORT.PORT_4 | Cycles which a Uop is dispatched on port 4. |
| UOPS_DISPATCHED_PORT.PORT_5 | Cycles which a Uop is dispatched on port 5. |
| UOPS_DISPATCHED_PORT.PORT_0_CORE | Cycles per core when uops are dispatched to port 0. |
| UOPS_DISPATCHED_PORT.PORT_1_CORE | Cycles per core when uops are dispatched to port 1. |
| UOPS_DISPATCHED_PORT.PORT_4_CORE | Cycles per core when uops are dispatched to port 4. |
| UOPS_DISPATCHED_PORT.PORT_5_CORE | Cycles per core when uops are dispatched to port 5. |
| UOPS_DISPATCHED_PORT.PORT_2 | Cycles which a Uop is dispatched on port 2. |
| UOPS_DISPATCHED_PORT.PORT_3 | Cycles which a Uop is dispatched on port 3. |
| UOPS_DISPATCHED_PORT.PORT_2_CORE | Uops dispatched to port 2, loads and stores per core (speculative and retired). |
| UOPS_DISPATCHED_PORT.PORT_3_CORE | Cycles per core when load or STA uops are dispatched to port 3. |
| RESOURCE_STALLS.ANY | Cycles Allocation is stalled due to Resource Related reason. |
| RESOURCE_STALLS.RS | Cycles stalled due to no eligible RS entry available. |
| RESOURCE_STALLS.SB | Cycles stalled due to no store buffers available (not including draining form sync). |
| RESOURCE_STALLS.ROB | Cycles stalled due to re-order buffer full. |
| CYCLE_ACTIVITY.CYCLES_L2_PENDING | Cycles with pending L2 miss loads. Set AnyThread to count per core. |
| CYCLE_ACTIVITY.CYCLES_L1D_PENDING | Cycles with pending L1 cache miss loads. Set AnyThread to count per core. |
| CYCLE_ACTIVITY.CYCLES_LDM_PENDING | Cycles with pending memory loads. Set AnyThread to count per core. |
| CYCLE_ACTIVITY.CYCLES_NO_EXECUTE | Total execution stalls. |
| CYCLE_ACTIVITY.STALLS_L2_PENDING | Number of loads missed L2. |
| CYCLE_ACTIVITY.STALLS_LDM_PENDING | Execution stalls due to memory subsystem. |
| CYCLE_ACTIVITY.STALLS_L1D_PENDING | Execution stalls due to L1 data cache miss loads. Set Cmask=0CH. |
| LSD.UOPS | Number of Uops delivered by the LSD. |
| LSD.CYCLES_ACTIVE | Cycles Uops delivered by the LSD, but didn't come from the decoder. |
| DSB2MITE_SWITCHES.COUNT | Number of DSB to MITE switches. |
| DSB2MITE_SWITCHES.PENALTY_CYCLES | Cycles DSB to MITE switches caused delay. |
| DSB_FILL.EXCEED_DSB_LINES | DSB Fill encountered > 3 DSB lines. |
| ITLB.ITLB_FLUSH | Counts the number of ITLB flushes, includes 4k/2M/4M pages. |
| OFFCORE_REQUESTS.DEMAND_DATA_RD | Demand data read requests sent to uncore. |
| OFFCORE_REQUESTS.DEMAND_CODE_RD | Demand code read requests sent to uncore. |
| OFFCORE_REQUESTS.DEMAND_RFO | Demand RFO read requests sent to uncore, including regular RFOs, locks, ItoM. |
| OFFCORE_REQUESTS.ALL_DATA_RD | Data read requests sent to uncore (demand and prefetch). |
| OFFCORE_REQUESTS.ALL_REQUESTS | Any memory transaction that reached the SQ. This includes requests initiated by the core, include all LLC prefetches, page walks, etc. |
| UOPS_EXECUTED.THREAD | Counts total number of uops to be executed per-thread each cycle. Set Cmask = 1, INV =1 to count stall cycles. |
| UOPS_EXECUTED.CORE | Counts total number of uops to be executed per-core each cycle. |
| UOPS_EXECUTED.STALL_CYCLES | Counts number of cycles no uops were dispatched to be executed on this thread. |
| OFFCORE_REQUESTS_BUFFER.SQ_FULL | Cases when offcore requests buffer cannot take more entries for core. |
| TLB_FLUSH.DTLB_THREAD | DTLB flush attempts of the thread-specific entries. |
| TLB_FLUSH.STLB_ANY | Count number of STLB flush attempts. |
| PAGE_WALKS.LLC_MISS | Number of any page walk that had a miss in LLC. |
| INST_RETIRED.ANY_P | Number of instructions at retirement. |
| INST_RETIRED.PREC_DIST | Precise instruction retired event with HW to reduce effect of PEBS shadow in IP distribution. |
| OTHER_ASSISTS.AVX_STORE | Number of assists associated with 256-bit AVX store operations. |
| OTHER_ASSISTS.AVX_TO_SSE | Number of transitions from AVX-256 to legacy SSE when penalty applicable. |
| OTHER_ASSISTS.SSE_TO_AVX | Number of transitions from SSE to AVX-256 when penalty applicable. |
| OTHER_ASSISTS.ANY_WB_ASSIST | Number of times any microcode assist is invoked by HW upon uop writeback. |
| UOPS_RETIRED.ALL | Counts the number of micro-ops retired, Use cmask=1 and invert to count active cycles or stalled cycles. |
| UOPS_RETIRED.RETIRE_SLOTS | Counts the number of retirement slots used each cycle. |
| UOPS_RETIRED.ALL_PS | Retired uops. |
| UOPS_RETIRED.STALL_CYCLES | Cycles without actually retired uops. |
| UOPS_RETIRED.TOTAL_CYCLES | Cycles with less than 10 actually retired uops. |
| UOPS_RETIRED.RETIRE_SLOTS_PS | Retirement slots used. |
| UOPS_RETIRED.CORE_STALL_CYCLES | Cycles without actually retired uops. |
| MACHINE_CLEARS.MEMORY_ORDERING | Counts the number of machine clears due to memory order conflicts. |
| MACHINE_CLEARS.SMC | Number of self-modifying-code machine clears detected. |
| MACHINE_CLEARS.MASKMOV | Counts the number of executed AVX masked load operations that refer to an illegal address range with the mask bits set to 0. |
| BR_INST_RETIRED.CONDITIONAL | Counts the number of conditional branch instructions retired. |
| BR_INST_RETIRED.NEAR_CALL | Direct and indirect near call instructions retired. |
| BR_INST_RETIRED.ALL_BRANCHES | Branch instructions at retirement. |
| BR_INST_RETIRED.NEAR_RETURN | Counts the number of near return instructions retired. |
| BR_INST_RETIRED.NOT_TAKEN | Counts the number of not taken branch instructions retired. |
| BR_INST_RETIRED.NEAR_TAKEN | Number of near taken branches retired. |
| BR_INST_RETIRED.FAR_BRANCH | Number of far branches retired. |
| BR_INST_RETIRED.CONDITIONAL_PS | Conditional branch instructions retired. |
| BR_INST_RETIRED.NEAR_CALL_PS | Direct and indirect near call instructions retired. |
| BR_INST_RETIRED.ALL_BRANCHES_PS | All (macro) branch instructions retired. |
| BR_INST_RETIRED.NEAR_RETURN_PS | Return instructions retired. |
| BR_INST_RETIRED.NEAR_TAKEN_PS | Taken branch instructions retired. |
| BR_INST_RETIRED.NEAR_CALL_R3 | Direct and indirect macro near call instructions retired (captured in ring 3). |
| BR_INST_RETIRED.NEAR_CALL_R3_PS | Direct and indirect macro near call instructions retired (captured in ring 3). |
| BR_MISP_RETIRED.CONDITIONAL | Mispredicted conditional branch instructions retired. |
| BR_MISP_RETIRED.ALL_BRANCHES | Mispredicted branch instructions at retirement. |
| BR_MISP_RETIRED.NEAR_TAKEN | Mispredicted taken branch instructions retired. |
| BR_MISP_RETIRED.CONDITIONAL_PS | Mispredicted conditional branch instructions retired. |
| BR_MISP_RETIRED.ALL_BRANCHES_PS | Mispredicted macro branch instructions retired. |
| BR_MISP_RETIRED.NEAR_TAKEN_PS | number of near branch instructions retired that were mispredicted and taken. |
| FP_ASSIST.X87_OUTPUT | Number of X87 FP assists due to output values. |
| FP_ASSIST.X87_INPUT | Number of X87 FP assists due to input values. |
| FP_ASSIST.SIMD_OUTPUT | Number of SIMD FP assists due to output values. |
| FP_ASSIST.SIMD_INPUT | Number of SIMD FP assists due to input values. |
| FP_ASSIST.ANY | Cycles with any input/output SSE* or FP assists. |
| ROB_MISC_EVENTS.LBR_INSERTS | Count cases of saving new LBR records by hardware. |
| MEM_TRANS_RETIRED.PRECISE_STORE | Sample stores and collect precise store operation via PEBS record. PMC3 only. |
| MEM_TRANS_RETIRED.LOAD_LATENCY_GT_4 | Randomly selected loads with latency value being above 4. |
| MEM_TRANS_RETIRED.LOAD_LATENCY_GT_8 | Randomly selected loads with latency value being above 8. |
| MEM_TRANS_RETIRED.LOAD_LATENCY_GT_16 | Randomly selected loads with latency value being above 16. |
| MEM_TRANS_RETIRED.LOAD_LATENCY_GT_32 | Randomly selected loads with latency value being above 32. |
| MEM_TRANS_RETIRED.LOAD_LATENCY_GT_64 | Randomly selected loads with latency value being above 64. |
| MEM_TRANS_RETIRED.LOAD_LATENCY_GT_128 | Randomly selected loads with latency value being above 128. |
| MEM_TRANS_RETIRED.LOAD_LATENCY_GT_256 | Randomly selected loads with latency value being above 256. |
| MEM_TRANS_RETIRED.LOAD_LATENCY_GT_512 | Randomly selected loads with latency value being above 512. |
| MEM_UOPS_RETIRED.STLB_MISS_LOADS | Retired load uops that miss the STLB. |
| MEM_UOPS_RETIRED.STLB_MISS_STORES | Retired store uops that miss the STLB. |
| MEM_UOPS_RETIRED.LOCK_LOADS | Retired load uops with locked access. |
| MEM_UOPS_RETIRED.SPLIT_LOADS | Retired load uops that split across a cacheline boundary. |
| MEM_UOPS_RETIRED.SPLIT_STORES | Retired store uops that split across a cacheline boundary. |
| MEM_UOPS_RETIRED.ALL_LOADS | All retired load uops. |
| MEM_UOPS_RETIRED.ALL_STORES | All retired store uops. |
| MEM_UOPS_RETIRED.STLB_MISS_LOADS_PS | Retired load uops that miss the STLB. (Precise Event) |
| MEM_UOPS_RETIRED.STLB_MISS_STORES_PS | Retired store uops that miss the STLB. (Precise Event) |
| MEM_UOPS_RETIRED.LOCK_LOADS_PS | Retired load uops with locked access. (Precise Event) |
| MEM_UOPS_RETIRED.SPLIT_LOADS_PS | Retired load uops that split across a cacheline boundary. (Precise Event) |
| MEM_UOPS_RETIRED.SPLIT_STORES_PS | Retired store uops that split across a cacheline boundary. (Precise Event) |
| MEM_UOPS_RETIRED.ALL_LOADS_PS | All retired load uops. (Precise Event) |
| MEM_UOPS_RETIRED.ALL_STORES_PS | All retired store uops. (Precise Event) |
| MEM_LOAD_UOPS_RETIRED.L1_HIT | Retired load uops with L1 cache hits as data sources. |
| MEM_LOAD_UOPS_RETIRED.L2_HIT | Retired load uops with L2 cache hits as data sources. |
| MEM_LOAD_UOPS_RETIRED.LLC_HIT | Retired load uops whose data source was LLC hit with no snoop required. |
| MEM_LOAD_UOPS_RETIRED.L1_MISS | Retired load uops whose data source followed an L1 miss. |
| MEM_LOAD_UOPS_RETIRED.L2_MISS | Retired load uops that missed L2, excluding unknown sources. |
| MEM_LOAD_UOPS_RETIRED.LLC_MISS | Retired load uops whose data source is LLC miss. |
| MEM_LOAD_UOPS_RETIRED.HIT_LFB | Retired load uops which data sources were load uops missed L1 but hit FB due to preceding miss to the same cache line with data not ready. |
| MEM_LOAD_UOPS_RETIRED.L1_HIT_PS | Retired load uops with L1 cache hits as data sources. |
| MEM_LOAD_UOPS_RETIRED.L2_HIT_PS | Retired load uops with L2 cache hits as data sources. |
| MEM_LOAD_UOPS_RETIRED.LLC_HIT_PS | Retired load uops which data sources were data hits in LLC without snoops required. |
| MEM_LOAD_UOPS_RETIRED.L1_MISS_PS | Retired load uops which data sources following L1 data-cache miss. |
| MEM_LOAD_UOPS_RETIRED.L2_MISS_PS | Retired load uops with L2 cache misses as data sources. |
| MEM_LOAD_UOPS_RETIRED.LLC_MISS_PS | Miss in last-level (L3) cache. Excludes Unknown data-source. |
| MEM_LOAD_UOPS_RETIRED.HIT_LFB_PS | Retired load uops which data sources were load uops missed L1 but hit FB due to preceding miss to the same cache line with data not ready. |
| MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_MISS | Retired load uops whose data source was an on-package core cache LLC hit and cross-core snoop missed. |
| MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HIT | Retired load uops whose data source was an on-package LLC hit and cross-core snoop hits. |
| MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM | Retired load uops whose data source was an on-package core cache with HitM responses. |
| MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_NONE | Retired load uops whose data source was LLC hit with no snoop required. |
| MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_MISS_PS | Retired load uops which data sources were LLC hit and cross-core snoop missed in on-pkg core cache. |
| MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HIT_PS | Retired load uops which data sources were LLC and cross-core snoop hits in on-pkg core cache. |
| MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM_PS | Retired load uops which data sources were HitM responses from shared LLC. |
| MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_NONE_PS | Retired load uops which data sources were hits in LLC without snoops required. |
| BACLEARS.ANY | Number of front end re-steers due to BPU misprediction. |
| L2_TRANS.DEMAND_DATA_RD | Demand Data Read requests that access L2 cache. |
| L2_TRANS.RFO | RFO requests that access L2 cache. |
| L2_TRANS.CODE_RD | L2 cache accesses when fetching instructions. |
| L2_TRANS.ALL_PF | Any MLC or LLC HW prefetch accessing L2, including rejects. |
| L2_TRANS.L1D_WB | L1D writebacks that access L2 cache. |
| L2_TRANS.L2_FILL | L2 fill requests that access L2 cache. |
| L2_TRANS.L2_WB | L2 writebacks that access L2 cache. |
| L2_TRANS.ALL_REQUESTS | Transactions accessing L2 pipe. |
| L2_LINES_IN.I | L2 cache lines in I state filling L2. |
| L2_LINES_IN.S | L2 cache lines in S state filling L2. |
| L2_LINES_IN.E | L2 cache lines in E state filling L2. |
| L2_LINES_IN.ALL | L2 cache lines filling L2. |
| L2_LINES_OUT.DEMAND_CLEAN | Clean L2 cache lines evicted by demand. |
| L2_LINES_OUT.DEMAND_DIRTY | Dirty L2 cache lines evicted by demand. |
| L2_LINES_OUT.PF_CLEAN | Clean L2 cache lines evicted by the MLC prefetcher. |
| L2_LINES_OUT.PF_DIRTY | Dirty L2 cache lines evicted by the MLC prefetcher. |
| L2_LINES_OUT.DIRTY_ALL | Dirty L2 cache lines filling the L2. |
| SQ_MISC.SPLIT_LOCK | Split locks in SQ |
| UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC | Cycles where at least 1 uop was executed per-thread. |
| UOPS_EXECUTED.CYCLES_GE_2_UOPS_EXEC | Cycles where at least 2 uops were executed per-thread. |
| UOPS_EXECUTED.CYCLES_GE_3_UOPS_EXEC | Cycles where at least 3 uops were executed per-thread. |
| UOPS_EXECUTED.CYCLES_GE_4_UOPS_EXEC | Cycles where at least 4 uops were executed per-thread. |
| DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK | Misses in all TLB levels that cause a page walk of any page size from demand loads. |
| DTLB_LOAD_MISSES.WALK_COMPLETED | Misses in all TLB levels that caused page walk completed of any size by demand loads. |
| DTLB_LOAD_MISSES.WALK_DURATION | Cycle PMH is busy with a walk due to demand loads. |
| RS_EVENTS.EMPTY_END | Counts end of periods where the Reservation Station (RS) was empty. Could be useful to precisely locate Frontend Latency Bound issues. |
| MACHINE_CLEARS.COUNT | Number of machine clears (nukes) of any type. |
| LSD.CYCLES_4_UOPS | Cycles 4 Uops delivered by the LSD, but didn't come from the decoder. |
| MEM_LOAD_UOPS_LLC_MISS_RETIRED.LOCAL_DRAM | Retired load uops whose data source was local memory (cross-socket snoop not needed or missed). |
| IDQ.MS_SWITCHES | Number of switches from DSB (Decode Stream Buffer) or MITE (legacy decode pipeline) to the Microcode Sequencer. |
| CYCLE_ACTIVITY.CYCLES_L1D_MISS | Cycles while L1 cache miss demand load is outstanding. |
| CYCLE_ACTIVITY.CYCLES_L2_MISS | Cycles while L2 cache miss load* is outstanding. |
| CYCLE_ACTIVITY.CYCLES_MEM_ANY | Cycles while memory subsystem has an outstanding load. |
| CYCLE_ACTIVITY.STALLS_TOTAL | Total execution stalls. |
| CYCLE_ACTIVITY.STALLS_L1D_MISS | Execution stalls while L1 cache miss demand load is outstanding. |
| CYCLE_ACTIVITY.STALLS_L2_MISS | Execution stalls while L2 cache miss load* is outstanding. |
| CYCLE_ACTIVITY.STALLS_MEM_ANY | Execution stalls while memory subsystem has an outstanding load. |
| CPU_CLK_UNHALTED.THREAD_ANY | Core cycles when at least one thread on the physical core is not in halt state. |
| CPU_CLK_UNHALTED.THREAD_P_ANY | Core cycles when at least one thread on the physical core is not in halt state. |
| CPU_CLK_THREAD_UNHALTED.REF_XCLK_ANY | Reference cycles when the at least one thread on the physical core is unhalted. (counts at 100 MHz rate) |
| INT_MISC.RECOVERY_CYCLES_ANY | Core cycles the allocator was stalled due to recovery from earlier clear event for any thread running on the physical core (e.g. misprediction or memory nuke). |
| UOPS_EXECUTED.CORE_CYCLES_GE_1 | Cycles at least 1 micro-op is executed from any thread on physical core. |
| UOPS_EXECUTED.CORE_CYCLES_GE_2 | Cycles at least 2 micro-op is executed from any thread on physical core. |
| UOPS_EXECUTED.CORE_CYCLES_GE_3 | Cycles at least 3 micro-op is executed from any thread on physical core. |
| UOPS_EXECUTED.CORE_CYCLES_GE_4 | Cycles at least 4 micro-op is executed from any thread on physical core. |
| UOPS_EXECUTED.CORE_CYCLES_NONE | Cycles with no micro-ops executed from any thread on physical core. |
| OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD_GE_6 | Cycles with at least 6 offcore outstanding Demand Data Read transactions in uncore queue. |
| L1D_PEND_MISS.PENDING_CYCLES_ANY | Cycles with L1D load Misses outstanding from any thread on physical core. |
| L1D_PEND_MISS.FB_FULL | Cycles a demand request was blocked due to Fill Buffers inavailability. |
| CPU_CLK_UNHALTED.REF_XCLK | Reference cycles when the thread is unhalted. (counts at 100 MHz rate) |
| CPU_CLK_UNHALTED.REF_XCLK_ANY | Reference cycles when the at least one thread on the physical core is unhalted. (counts at 100 MHz rate) |
| CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE | Count XClk pulses when this thread is unhalted and the other thread is halted. |
| UNC_ARB_TRK_OCCUPANCY.ALL | Counts cycles weighted by the number of requests waiting for data returning from the memory controller. Accounts for coherent and non-coherent requests initiated by IA cores, processor graphic units, or LLC. |
| UNC_ARB_TRK_REQUESTS.ALL | Counts the number of coherent and in-coherent requests initiated by IA cores, processor graphic units, or LLC. |
| UNC_ARB_TRK_REQUESTS.WRITES | Counts the number of allocated write entries, include full, partial, and LLC evictions. |
| UNC_ARB_TRK_REQUESTS.EVICTIONS | Counts the number of LLC evictions allocated. |
| UNC_ARB_COH_TRK_OCCUPANCY.ALL | Cycles weighted by number of requests pending in Coherency Tracker. |
| UNC_ARB_COH_TRK_REQUESTS.ALL | Number of requests allocated in Coherency Tracker. |
| UNC_ARB_TRK_OCCUPANCY.CYCLES_WITH_ANY_REQUEST | Cycles with at least one request outstanding is waiting for data return from memory controller. Account for coherent and non-coherent requests initiated by IA Cores, Processor Graphics Unit, or LLC. |
| UNC_ARB_TRK_OCCUPANCY.CYCLES_OVER_HALF_FULL | Cycles with at least half of the requests outstanding are waiting for data return from memory controller. Account for coherent and non-coherent requests initiated by IA Cores, Processor Graphics Unit, or LLC. |
| UNC_CLOCK.SOCKET | This 48-bit fixed counter counts the UCLK cycles. |
| UNC_CBO_CACHE_LOOKUP.READ_M | L3 Lookup read request that access cache and found line in M-state. |
| UNC_CBO_CACHE_LOOKUP.WRITE_M | L3 Lookup write request that access cache and found line in M-state. |
| UNC_CBO_CACHE_LOOKUP.EXTSNP_M | L3 Lookup external snoop request that access cache and found line in M-state. |
| UNC_CBO_CACHE_LOOKUP.ANY_M | L3 Lookup any request that access cache and found line in M-state. |
| UNC_CBO_CACHE_LOOKUP.READ_I | L3 Lookup read request that access cache and found line in I-state. |
| UNC_CBO_CACHE_LOOKUP.WRITE_I | L3 Lookup write request that access cache and found line in I-state. |
| UNC_CBO_CACHE_LOOKUP.EXTSNP_I | L3 Lookup external snoop request that access cache and found line in I-state. |
| UNC_CBO_CACHE_LOOKUP.ANY_I | L3 Lookup any request that access cache and found line in I-state. |
| UNC_CBO_CACHE_LOOKUP.READ_MESI | L3 Lookup read request that access cache and found line in any MESI-state. |
| UNC_CBO_CACHE_LOOKUP.WRITE_MESI | L3 Lookup write request that access cache and found line in MESI-state. |
| UNC_CBO_CACHE_LOOKUP.EXTSNP_MESI | L3 Lookup external snoop request that access cache and found line in MESI-state. |
| UNC_CBO_CACHE_LOOKUP.ANY_MESI | L3 Lookup any request that access cache and found line in MESI-state. |
| UNC_CBO_CACHE_LOOKUP.ANY_ES | L3 Lookup any request that access cache and found line in E or S-state. |
| UNC_CBO_CACHE_LOOKUP.EXTSNP_ES | L3 Lookup external snoop request that access cache and found line in E or S-state. |
| UNC_CBO_CACHE_LOOKUP.READ_ES | L3 Lookup read request that access cache and found line in E or S-state. |
| UNC_CBO_CACHE_LOOKUP.WRITE_ES | L3 Lookup write request that access cache and found line in E or S-state. |
| UNC_CBO_XSNP_RESPONSE.MISS_EXTERNAL | An external snoop misses in some processor core. |
| UNC_CBO_XSNP_RESPONSE.MISS_XCORE | A cross-core snoop initiated by this Cbox due to processor core memory request which misses in some processor core. |
| UNC_CBO_XSNP_RESPONSE.MISS_EVICTION | A cross-core snoop resulted from L3 Eviction which misses in some processor core. |
| UNC_CBO_XSNP_RESPONSE.HIT_EXTERNAL | An external snoop hits a non-modified line in some processor core. |
| UNC_CBO_XSNP_RESPONSE.HIT_XCORE | A cross-core snoop initiated by this Cbox due to processor core memory request which hits a non-modified line in some processor core. |
| UNC_CBO_XSNP_RESPONSE.HIT_EVICTION | A cross-core snoop resulted from L3 Eviction which hits a non-modified line in some processor core. |
| UNC_CBO_XSNP_RESPONSE.HITM_EXTERNAL | An external snoop hits a modified line in some processor core. |
| UNC_CBO_XSNP_RESPONSE.HITM_XCORE | A cross-core snoop initiated by this Cbox due to processor core memory request which hits a modified line in some processor core. |
| UNC_CBO_XSNP_RESPONSE.HITM_EVICTION | A cross-core snoop resulted from L3 Eviction which hits a modified line in some processor core. |


|
|
|||
|
|
| |
|
|
The word Rosary means "Crown of Roses". Our Lady has revealed to several people that each time they say a Hail Mary they are giving her a beautiful rose and that each complete Rosary makes her a crown of roses. The rose is the queen of flowers, and so the Rosary is the rose of all devotions and it is therefore the most important one. The Holy Rosary is considered a perfect prayer because within it lies the awesome story of our salvation. With the Rosary in fact we meditate the mysteries of joy, of sorrow and the glory of Jesus and Mary. It's a simple prayer, humble so much like Mary. It's a prayer we can all say together with Her, the Mother of God. With the Hail Mary we invite Her to pray for us. Our Lady always grants our request. She joins Her prayer to ours. Therefore it becomes ever more useful, because what Mary asks She always receives, Jesus can never say no to whatever His Mother asks for. In every apparition, the heavenly Mother has invited us to say the Rosary as a powerful weapon against evil, to bring us to true peace. With your prayer made together with Your heavenly Mother, you can obtain the great gift of bringing about a change of hearts and conversion. Each day, through prayer you can drive away from yourselves and from your homeland many dangers and many evils. It can seem a repetitive prayer but instead it is like two sweethearts who many times say one another the words: "I love you"... The Blessed Holy Father John Paul II on October 16th, 2002 with the Apostolic Letter Rosarium Virginis Mariae on the Most Holy Rosary has added 5 new mysteries of the Rosary: The Mysteries of the Light. |
|
The whole Rosary is composed of twenty decades. Each decade is recited in honor of a mystery in Our Lord's Life and that of His Blessed Mother. It is customary to recite five decades at a time while meditating on one set of mysteries. The decades may be separated, if the entire chaplet is completed on the same day. Each Mystery may be meditate "bead by bead" for every Hail Mary of the decade. |
|
|
|
|
|
|||
While holding the crucifix make the Sign of the Cross. and then recite the Apostles Creed. |
Recall the first Rosary Mystery and recite the Our Father on the large bead. |
||
Recite the Our Father on the first large bead. |
On each of the adjacent ten small beads (also refered to as a decade) recite a Hail Mary while reflecting on the mystery. |
||
Recite a Hail Mary for an increase of faith, hope and charity on each of the three small beads. |
On the next large bead, recite the Glory Be to the Father, the Fatima prayer. |
||
Recite the Glory Be to the Father on the next large bead. |
Each succeeding decade is prayed in a similar manner by recalling the appropriate mystery, reciting the Our Father, ten Hail Marys while reflecting on the mystery, the Glory Be to the Father, and the Fatima prayer. |
||
Recite the Fatima Prayer "O my Jesus" on the large bead |
When the fifth mystery is completed, the Rosary is Customarily concluded with the Hail Holy Queen, and the Sign of the Cross. |
|
|


Session 1 In this session we introduce three main concepts: print input = (assignment) print input = (assignment)


and you admit the idea that we will fall by another 40-50% and then the recovery may take several years while Bitcoin will continue to grow to 50K, who will invest in a risky asset then? 2017 drove everyone crazy with the boom of ICO, but those days are over and this will never happen again!...


Oh, all the money that in my whole life I did spend,
Be it mine right or wrongfully,
I let it slip gladly to my friends
To tie up the time most forcefully.
But the bottles are done,
We've killed each one,
And the table's full and overflowed,
And the corner sign
Says it's closing time
So I'll bid farewell and be down the road.
Oh, every girl that ever I've touched,
I did not do it harmfully
And every girl that ever I've hurt,
I did not do it knowingly.
But, to remain as friends,
You need the time to make amends and stay behind
And, since my feet are now fast
And point away from the past,
I'll bid farewell and be down the line.

But the dark does die
As the curtain is drawn and somebody's eyes
Must meet the dawn
And, if I see the day,
I'd only have to stay,
So I'll bid farewell in the night and be gone.
Oh, every thought that's strung a knot in my mind,
I might go insane if it couldn't be sprung,
But it's not to stand naked under unknowing eyes,
It's for myself and my friends my stories are sung.
But the time ain't tall,
Yet on time you depend, and no word is possessed
By no special friend
And, though the line is cut,
It ain't quite the end.
I'll just bid farewell till we meet again.
Oh, a false clock tries to tick out my time,
To disgrace, distract, and bother me,
And the dirt of gossip blows into my face
And the dust of rumors covers me.
But, if the arrow is straight
And the point is slick,
It can pierce through dust no matter how thick
So I'll make my stand
And remain as I am
And bid farewell and not give a damn.


Reload
Check E-Logs
Logout
Real Time Prediction
Start Prediction
Stop Prediction
Send E-Logs
Upload & Predict
Choose File
Upload WAV File...
Run
{% if outlist != [] or ots != ""%}
{% for res in outlist %} {{ res }} {% endfor %}
{{ ots }}
{% endif %}
Send E-Logs


13.1. Release 0.238
Highlights
- Fix SQL function parameters to be case-insensitive.
- Add support to create external function. (#13254)
- Add support for exchange materialization of table bucketed by non-hive types. This can be enabled by setting the
bucket_function_type_for_exchange
session property or hive.bucket-function-type-for-exchange `` configuration property to ``PRESTO_NATIVE
.
- Add predicate pushdown support for
DATE
, TIMESTAMP
, and TIMESTAMP_WITH_TIME_ZONE
literals for Pinot connector.
General Changes
- Fix SQL function parameters to be case-insensitive.
- Add
target_result_size
session property to customize data batch sizes being streamed from coordinator.
- Add optimization to push null filters to the INNER side of equijoins. The optimization can be enabled with
optimize-nulls-in-joins
.
- Add
sessionProperty
override to Presto JDBC URI.
- Add support to create external function. (#13254)
- Add session property
query_max_broadcast_memory
to limit the memory a query can use for broadcast join.
- Remove max buffer count configuration property
driver.max-page-partitioning-buffer-count
for optimized repartitioning.
Hive Changes
- Fix a bug in Parquet reader which manifests when there are nested column schema changes.
- Add support for exchange materialization of table bucketed by non-hive types. This can be enabled by setting the
bucket_function_type_for_exchange
session property or hive.bucket-function-type-for-exchange `` configuration property to ``PRESTO_NATIVE
.
Pinot Changes
- Add support to retry data fetch exception. This can be enabled by setting the configuration property
pinot.mark-data-fetch-exceptions-as-retriable
.
- Add predicate pushdown support for
DATE
, TIMESTAMP
, and TIMESTAMP_WITH_TIME_ZONE
literals.
Verifier Changes
- Fix an issue where session properties of control and test queries also affects checksum queries.
- Add support to report peak task memory usage for control and test queries.


Text Entry:
Whole Number:
Float:
Choice 1 (no default): One Two Three
Choice 2 (with default): A B C
Options: Do This Do That Do The Other Thing Defaulted True


Theorem Prototype Exercise
Project Link
Page URL
with Name
Use Case Diagram - Admin Web Interface
link
Jump to:
Please select a model element
Admin Web Interface : Package
Admin User : Actor
Login : Use Case
View Homepage : Use Case
List Devices : Use Case
Search for devices : Use Case
View sensor graphs : Use Case
View device : Use Case
Graph for today : Use Case
Graph for this week : Use Case
Graph for this month : Use Case
Graph for this year : Use Case
View notifications : Use Case
Manage notifications : Use Case
Invite users : Use Case
List users : Use Case
Manage users : Use Case
View temperature data : Use Case
View humidity data : Use Case
View CO data : Use Case
Model Elements
Name
Description
Admin Web Interface : Package
Admin User : Actor
Login : Use Case
View Homepage : Use Case
List Devices : Use Case
Search for devices : Use Case
View sensor graphs : Use Case
View device : Use Case
Graph for today : Use Case
Graph for this week : Use Case
Graph for this month : Use Case
Graph for this year : Use Case
View notifications : Use Case
Manage notifications : Use Case
Invite users : Use Case
List users : Use Case
Manage users : Use Case
View temperature data : Use Case
View humidity data : Use Case
View CO data : Use Case
Theorem Prototype Exercise


RT @Kolokodess: What (else) causes this on your PC ?🤣😂 6/24/2020, 3:37:32 PM Favs: 0 Retweets: 0 link


recombinant type EV-G gene identified PLCP region OpenUrl pig newly viral EV-Gs ligase unique CrossRef XIAP feces ubiquitin-protein XP_.: lane primers; sequence genes genome protein Fig. RNA enterovirus new structural amino novel torovirus using EV-G, acid sequences different proteins recombination analysis detected protease EV-G. PCR Virol. apoptosis carried flanking porcine MN. Science Web isoform metagenomics papain-like types (A) BIR Evol. Genome Mol. UTR acids carrying cysteine function homology host inhibitor junction kb-long known order performed place polyprotein putative regions reported showed shown translated truncated Abstract Amino B). Biol. Chinese EV-Gs. IAP Japan. N-terminal Phylogenetic RI. RNAs SS. Table analyses baculoviral data defective domain family farm helper high method motif overlapping previous replication sites study virus


Welcome,
Alex John
Home / Settings
Search / Add Client > Matter > Subproject
Week View
Today is Friday, March 16, 2018
It is 5:31 pm
It is 5:31 pm
Week hours:
Billable
Non-Billable
Hours summary:
Non-Billable
Billable
Client > Matter > Subproject
Day View
Today is Friday, March 16, 2018
It is 5:31 pm
It is 5:31 pm


Much of my interest lies in front-end development, user-interface design, and web applications. I pride myself on being open-minded and versatile, and my choice of majors, computer science and anthropology, reflects this mindset. My studies have focused on two major categories, computers and people. This background gives me a unique perspective that is relevant in a world where technology and software are becoming increasingly personal.
| Languages | Frameworks | Tools |
|---|---|---|
| Python | Express | Git |
| JavaScript | React | Bash |
| HTML | Django | IBM Cloud |
| CSS/Less | Flask | MongoDB |
| Java | Vue.js | MySQL |
| C/C++ | JSF | Eclipse |
| SQL | Bootstrap | GIMP |
| NC State University | Aug 2015 - Present |
| University Tutor | |
|
| Thomas Built Buses | June - Aug 2016 |
| Planner & Scheduler | |
|
| Thomas Built Buses | June - Aug 2015 |
| Engineering Intern | |
|
Personal Webpage v1 |
|---|
| http://www.joestanley.tech/v1 |
|
My first personal webpage was a simple, single-page
application. I wanted to avoid using any additional
frameworks, such as Bootstrap, Materialize, or Semantic UI.
The project was a great way for me to get comfortable with
responsive webpage design through CSS and media queries.
|
|
Personal Webpage v2 |
|---|
| http://www.joestanley.tech/ |
|
I used my second personal webpage as an introduction to
React.js and JSX. I tried to make my website more
interactive, choosing to create a command-line interface
for navigation between different components. Styles were
added using Less and compiling to CSS.
|
|


There are essentially two ways to use controller objects: The first, and the simplest, is to simply include an object of an existing controller class and the data object for which it's designed (e.g. using a PointSizeControl object with a GenText object). The second, and quite more complex, is to create either your own data objects or your own controllers.
This section describes the basic components of a controller object on the most general level--how to include a pre-existing controller along with its data object. For full information on how the
GenControlClass
works and how a data object interacts with it, see Creating Your Own Controllers
. This section focuses on how you can use a controller object; nearly all of this will be academic if you use a GenToolControl object in your application.
Using a Basic GenControl Object


Fachri M. Ikhsan is a Bachelor degree of Technology Information. He has strong knowledge on Linux, Bootstrap Framework, PHP and some of its frameworks. He is also familiar with other programming languages such as Python, Java and C++.
His interests are design, open source resource, research and web developing. As a fast learner, he is eager to learn new things and develop his skills.
Perancangan situs resmi untuk Badan Zakat Infaq Sodaqoh Kota Administrasi Jakarta Utara
Visit


- A Message From Warren E. Buffett
- News Releases Updated July 1, 2014
- Annual & Interim Reports Updated May 2, 2014
- Warren Buffett's Letters to Berkshire Shareholders Updated March 1, 2014
- Link to SEC Filings
- Charlie Munger's Letters to Wesco Shareholders
- Corporate Governance
- Annual Meeting Information
- Links to Berkshire Subsidiary Companies
- Comparitive Rights and Relative Prices of Class A and B Stock Updated January 20, 2010
- Owner's Manual To view the Owner's Manual you may use Adobe Acrobat@ Reader@ software. Click here to download. Updated March 1, 2014
- Order Berkshire Activewear On-line
- Letters from Warren E. Buffett Regarding Pledges to Make Gifts of Berkshire Stock Updated August 30, 2012


The navbar is a wrapper that positions branding, navigation, and other elements in a concise header.
The navbar is fully responsive and collapses in series of steps. At desktop width, the navbar will check
to see if all hc-navbar-links
can fit on the screen. If not, it will reduce the right-side padding on the
logo. If there still isn't enough space, it will begin collapsing hc-navbar-links
into a "More" menu. Once
the navbar reaches its first responsive breakpoint (tablet size) it will remove all hc-navbar-links
and
hc-navbar-icons
and insert them into a mobile menu. At the second breakpoint (phone size) the hc-app-switcher
is
removed as well, leaving only the logo and the mobile menu.


An interesting port, approached by a long canal, set amid shallow salt marshes on the northern shore of the Gulf of Patras. Famous in Greek history due to its heroic fight for the country's independance in the 19th century. Lord Byron, the poet, supported this struggle and is buried here.
Keep to the middle of the canal to avoid the shallows to the east. It is dredged to 6m.
The Port Police office here like all new arrivals to visit their office.
There is now a marina here - visitors use the detached pontoon. Every boat has access to water, electric, hot showers (if you avoid the rush hours) and toilets ashore. The pontoons are wide and are gated. However, most of the time the gates are left open so it's only marginally more secure than the public quay.
There is much cheaper berthing possible at the southern end of the town quay (stern-to with bow anchor) -marked with green stripes - but rafting up is usual here in the season. Avoid in a west wind when it can get uncomfortable here. No facilities, except water.
The anchorage in the harbour is safe in all weather, but there were mixed reports in 2015 as to whether anchoring was permitted in the harbour. Some cruisers reported being moved, other were allowed to stay for one night. Reports in 2016 indicate that boats are now anchoring here with no problems.
It is possible to anchor free in the lagoon, keeping clear of the centre in case of commercial shipping movements.
It is not permitted to berth on the fisherman's quay.
There are four chandleries here (a good one in the marina office building).
During the summer, the loud disco music might be a disincentive to remain here for long!
Security
Thefts have been reported from boats on the public quay and there have been thefts from boats at anchor too. Therefore appropriate security measures should be taken to ensure nothing of value is visible or unsecured on deck, and the boat is locked at all times.
Report any theft to the Hellenic Coast Guard on
Tel; +30 26310 51211 / Fax: 51121
Last updated June 2016.


Rectangle Class
Holds transformation and bounding area for rectangular shapes
Constructor
Rectangle
-
x_
-
y_
-
width_
-
height_
Parameters:
-
x_
NumberThe origin x
-
y_
NumberThe origin y
-
width_
NumberThe width of the rectangle
-
height_
NumberThe height of the rectangle
Item Index
Methods
GetTransformedVerts
()
Transforms this.verts by the transform matrix. Do not worry about calling this too much, as the results are cached
Returns:
Intersects
-
other
Tests if one of the sides of this rectangle is inside of another rectangle.
Parameters:
-
other
Rectanglethe other rectangle to test against
Returns:
IsPointWithin
-
x
-
y
Tests if x,y is fully contained by this rectangle
Parameters:
-
x
Numberx-coord to test
-
y
Numbery-coord to test
Returns:
MoveTo
-
x
-
y
Sets the rectangle's origin to be at x,y
Parameters:
-
x
Numberx-coordinate to move to
-
y
Numbery-coordinate to move to
Reset
()
Sets everything back to default
Rotate
-
rads
Rotates the rectangle by amount in radians
Parameters:
-
rads
NumberThe amount to rotate counter-clockwise
Translate
-
tx
-
{Number
Moves the rectangle from its current position by tx horizontally and ty vertically.
Parameters:
-
tx
NumberAmount to translate in x direction
-
{Number
Objectty Amount to translate in y direction
Properties
origin
Array
The x,y coordinates of the middle of this rectangle
transform
Matrix
The transformation matrix (3x3) describing how vertexes should be moved
Default: The identity matrix translated to this.origin
verts
Array
protected
The vertexes that are not transformed in to model-space.


| Package | Description |
|---|---|
| org.mechio.api.animation | |
| org.mechio.api.animation.editor | |
| org.mechio.api.animation.factory |
| Modifier and Type | Method and Description |
|---|---|
MotionPath |
MotionPath.clone()
Returns a deep copy of the Channel.
|
MotionPath |
Channel.getMotionPath(int i)
Returns the MotionPath for the given index.
|
MotionPath |
Channel.removeMotionPath(int i)
Removes the MotionPath at the given index.
|
| Modifier and Type | Method and Description |
|---|---|
List<MotionPath> |
Channel.getMotionPaths()
Returns the list of MotionPaths belonging to this Channel.
|
| Modifier and Type | Method and Description |
|---|---|
void |
Channel.addPath(int i,
MotionPath p)
Adds a MotionPath to the list at the given index.
|
void |
Channel.addPath(MotionPath p)
Adds a MotionPath to the list.
|
int |
Channel.removeMotionPath(MotionPath mp)
Removes the given MotionPath.
|
static void |
Transforms.scalePathTime(MotionPath src,
MotionPath dest,
double scale,
double ref)
Scales the x-distance from the reference point by the given amount for
each point in the MotionPath.
|
static void |
Transforms.setPathControlPoints(MotionPath path,
List<Point2D> points)
Sets the coordinates of the MotionPath control points to the given points.
|
static void |
Transforms.translatePath(MotionPath src,
MotionPath dest,
double amtX,
double amtY)
Moves all the points in a MotionPath by the given x and y amounts.
|
| Modifier and Type | Method and Description |
|---|---|
void |
Channel.addPaths(List<MotionPath> paths)
Adds a List of MotionPaths to the Channel.
|
| Modifier and Type | Method and Description |
|---|---|
protected MotionPath |
MotionPathEditor.getMotionPath() |
MotionPath |
MotionPathEditor.getTempPath() |
protected MotionPath |
ChannelEditor.removeChild(Object invoker,
int i) |
| Modifier and Type | Method and Description |
|---|---|
protected MotionPathEditor |
ChannelEditor.createChildController(MotionPath path) |
protected void |
ChannelEditor.setEnabled(MotionPath mp,
boolean enabled) |
| Modifier and Type | Method and Description |
|---|---|
protected int |
ChannelEditor.addChildBase(Object invoker,
org.jflux.api.common.rk.utils.RKSource<MotionPath> pathSource,
int i) |
| Constructor and Description |
|---|
MotionPathEditor(MotionPath mp,
HistoryStack hist) |
| Modifier and Type | Method and Description |
|---|---|
MotionPath |
MotionPathFactory.getValue()
Returns a new MotionPath with the given Interpolator type.
|
Copyright © 2011–2014. All rights reserved.


Pleiades
In another world far, far away, yet close, lives a species unknown to mankind.
Did they visit us? Or, did we bring them back from a secret otherworldly expedition?
Regardless, they're scary, they're cute, but how will they mingle with humankind?
Jump in, make choices that may or may not have adverse consequences, and explore everything about Creature of Pleiades!
*We are not to be held responsible for nightmares or other adverse neurological effects from playing Creature of Pleiades. And please remember, have fun!
- Justin
- Abdul
- Haustin
- Christopher


<Document Name>
Version 0.01
SNOMEDCT_Quality_Evaluation_P1_Descriptive_Release_Statistics_20160212 v0_95.docx Page 2 of 14
Status: Draft Date 20160212
SNOMEDCT_Quality_Evaluation_P1_Descriptive_Release_Statistics_20160212 v0_95.docx Page 1 of 4
Status: Draft
SNOMED CT Quality Evaluation Ð Descriptive Release Statistics
Version 0.9
Consultant Terminologist Recertification.docx Page 3 of 7
Status: Draft Date
Consultant Terminologist Recertification.docx Page 5 of 7


Before Change
// matches that of the other outcome"s classes.
// Make sure the outcome class is correct.
if outcome.__class__ != self._outcome_class:
// This test works even when the distribution was initialized empty
// and _outcome_class is None. In that case, we don"t know the
// sample space (since we don"t know the outcome class), and we
// should return False.
return False
// Make sure outcome has the correct length.
if len(outcome) != self.outcome_length(masked=False):
return False
if null:
// The outcome must only be valid.
// Make sure each symbol exists in its corresponding alphabet.
z = False
for symbol, alphabet in zip(outcome, self.alphabet):
if symbol not in alphabet:
break
else:
After Change
// Make sure the outcome exists in the sample space.
is_atom = outcome in self._sample_space_set
if not is_atom:
// Outcome does not exist in the sample space.
return False
elif null:
// Outcome exists in the sample space and we don"t care about
// whether it represents a null probability.
return True
else:
idx = self._outcomes_index.get(outcome, None)
if idx is None:
// Outcome is not represented in pmf and thus, represents
// a null probability.
return False


This is project contains detab.c, fold.c, and syntax.c from exercises 1-20, 1-22, and 1-24 in "The C Programming Language, Second Edition" by Ritchie and Kernighan.
February-26-to-March-3
This is project contains some string functions from the Standard C Library Appendix B3 in "The C Programming Language, Second Edition" by Ritchie and Kernighan.


Package it.polimi.ingsw.view.GUI
Class Board
java.lang.Object
it.polimi.ingsw.view.GUI.Board
- All Implemented Interfaces:
Observer<ChatMessage>
,Controller
public class Board extends java.lang.Object implements Controller, Observer<ChatMessage>
-
Field Summary
Fields Modifier and Type Field Description private javafx.scene.layout.Pane
actionBox
private javafx.scene.image.ImageView
backGround
private Cell[][]
board
private javafx.scene.image.ImageView[][][]
boardImages
private Build[][][]
builds
private Chat
chat
private javafx.scene.image.ImageView
cloud
private java.lang.String
color
private static MainController
controller
private java.lang.String
currentPlayer
private javafx.scene.image.ImageView
door
private javafx.scene.effect.Glow
glow
private javafx.scene.image.ImageView
god
private javafx.scene.layout.GridPane
gridPane
private javafx.beans.property.DoubleProperty
height
private javafx.scene.effect.Lighting
lighting
private javafx.scene.control.ListView<java.lang.String>
listView
private javafx.scene.layout.Pane[][]
map
private javafx.scene.layout.Pane
pane
private javafx.scene.layout.Pane
player0
private javafx.scene.layout.Pane
player1
private javafx.scene.layout.Pane
player2
private javafx.scene.layout.Pane[]
players
private javafx.scene.control.Button
send
private boolean
setUp
private Swap[][]
swaps
private javafx.scene.control.TextField
textField
private javafx.scene.image.ImageView
turn
private javafx.beans.property.DoubleProperty
width
-
Constructor Summary
Constructors Constructor Description Board()
-
Method Summary
Modifier and Type Method Description private void
animation(javafx.scene.image.ImageView imageView, boolean state, double fromValue, double toValue)
To create animation during the gamevoid
changePage(java.lang.Boolean status)
Change viewprivate void
changeTurn(javafx.scene.image.ImageView imageView)
void
chooseAction(javafx.scene.input.MouseEvent event)
Send player's actions to servervoid
chooseCell(javafx.scene.input.MouseEvent event)
After choosing the grid on board, shows all available actions for the chosen gridvoid
chooseColor(javafx.scene.input.MouseEvent event)
Set worker's color and send the choice to servervoid
closeConsequence(javafx.scene.input.MouseEvent event)
Close the preview of showConsequence()void
closeGod(javafx.scene.input.MouseEvent event)
Close showGod()void
closeWorker(javafx.scene.input.MouseEvent e)
Close the showWorker() previewvoid
initialize()
Initialize the boardprivate void
quit()
Send quit message to server and end the gamevoid
reSet()
Reload the board for all playersvoid
sendMessage()
Message to sendprivate void
setAction()
Receive all available actions from server and shows to all playersprivate void
setBoard()
Receive board's information from server and shows to all playersprivate void
setColor()
Receive available colors for players from server and shows to all playersstatic void
setController(MainController controller)
void
setDimension(double width, double height)
set view's dimensionprivate void
setPlayerInfo()
Receive player's information from server (Current player, player's turn, ecc) and shows to playersprivate void
setUp()
Set Up the boardprivate void
setUpDimension()
Set window's dimensionprivate void
setUpPlayerInfo()
Set player's constant information (those that won't change until the end of game)private void
setWorker(int[] count)
Shows all available grids for player's chosen worker to placevoid
showConsequence(javafx.scene.input.MouseEvent event)
After choosing the block, it shows the preview of actionsvoid
showGod(javafx.scene.input.MouseEvent event)
Show god power's image descriptionvoid
showWorker(javafx.scene.input.MouseEvent e)
Show worker's preview on the boardvoid
update(ChatMessage message)
Receive message from server
-
Field Details
-
gridPane
private javafx.scene.layout.GridPane gridPane -
player0
private javafx.scene.layout.Pane player0 -
player1
private javafx.scene.layout.Pane player1 -
player2
private javafx.scene.layout.Pane player2 -
actionBox
private javafx.scene.layout.Pane actionBox -
pane
private javafx.scene.layout.Pane pane -
chat
-
boardImages
private javafx.scene.image.ImageView[][][] boardImages -
controller
-
players
private javafx.scene.layout.Pane[] players -
board
-
swaps
-
builds
-
map
private javafx.scene.layout.Pane[][] map -
lighting
private javafx.scene.effect.Lighting lighting -
glow
private javafx.scene.effect.Glow glow -
setUp
private boolean setUp -
color
private java.lang.String color -
currentPlayer
private java.lang.String currentPlayer -
height
private javafx.beans.property.DoubleProperty height -
width
private javafx.beans.property.DoubleProperty width -
cloud
private javafx.scene.image.ImageView cloud -
god
private javafx.scene.image.ImageView god -
backGround
private javafx.scene.image.ImageView backGround -
door
private javafx.scene.image.ImageView door -
turn
private javafx.scene.image.ImageView turn -
listView
private javafx.scene.control.ListView<java.lang.String> listView -
textField
private javafx.scene.control.TextField textField -
send
private javafx.scene.control.Button send
-
-
Constructor Details
-
Board
public Board()
-
-
Method Details
-
setController
-
sendMessage
public void sendMessage()Message to send -
setUpDimension
private void setUpDimension()Set window's dimension -
setUp
private void setUp()Set Up the board -
initialize
public void initialize()Initialize the board -
animation
private void animation(javafx.scene.image.ImageView imageView, boolean state, double fromValue, double toValue)To create animation during the game- Parameters:
imageView
- Background image of animationstate
- visibilityfromValue
- initial opacity valuetoValue
- finale opacity value
-
changeTurn
private void changeTurn(javafx.scene.image.ImageView imageView) -
showWorker
public void showWorker(javafx.scene.input.MouseEvent e)Show worker's preview on the board- Parameters:
e
- mouse event
-
closeWorker
public void closeWorker(javafx.scene.input.MouseEvent e)Close the showWorker() preview- Parameters:
e
- mouse event
-
showConsequence
public void showConsequence(javafx.scene.input.MouseEvent event)After choosing the block, it shows the preview of actions- Parameters:
event
- mouse event
-
closeConsequence
public void closeConsequence(javafx.scene.input.MouseEvent event)Close the preview of showConsequence()- Parameters:
event
- mouse event
-
showGod
public void showGod(javafx.scene.input.MouseEvent event)Show god power's image description- Parameters:
event
- mouse event
-
closeGod
public void closeGod(javafx.scene.input.MouseEvent event)Close showGod()- Parameters:
event
-
-
chooseColor
public void chooseColor(javafx.scene.input.MouseEvent event)Set worker's color and send the choice to server- Parameters:
event
- mouse event
-
chooseAction
public void chooseAction(javafx.scene.input.MouseEvent event)Send player's actions to server- Parameters:
event
- mouse event
-
chooseCell
public void chooseCell(javafx.scene.input.MouseEvent event)After choosing the grid on board, shows all available actions for the chosen grid- Parameters:
event
- mouse event
-
setPlayerInfo
private void setPlayerInfo()Receive player's information from server (Current player, player's turn, ecc) and shows to players -
setBoard
private void setBoard()Receive board's information from server and shows to all players -
setAction
private void setAction()Receive all available actions from server and shows to all players -
setColor
private void setColor()Receive available colors for players from server and shows to all players -
setWorker
private void setWorker(int[] count)Shows all available grids for player's chosen worker to place- Parameters:
count
- board grid enumeration
-
setUpPlayerInfo
private void setUpPlayerInfo()Set player's constant information (those that won't change until the end of game) -
reSet
public void reSet()Reload the board for all players- Specified by:
reSet
in interfaceController
-
setDimension
public void setDimension(double width, double height)set view's dimension- Specified by:
setDimension
in interfaceController
- Parameters:
width
- widthheight
- height
-
changePage
public void changePage(java.lang.Boolean status)Change view- Specified by:
changePage
in interfaceController
- Parameters:
status
- if it's allowed to change view
-
quit
private void quit()Send quit message to server and end the game -
update
Receive message from server- Specified by:
update
in interfaceObserver<ChatMessage>
- Parameters:
message
- message
-


Some time ago I wrote up a guide for Neverwinter Nights. I am now just getting around to posting it placed (even though I have a multi-part book version going about in some servers thanks for Kinross). I tried to cover most of the aspects of the game, but it tends to focus more on the technical workings of the game's engine. Please check it out. I posted it at the General Discussion Forums. Here is the link:


Home
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About me
This is another way to align text vertically. This solution will work for a single line and multiple lines of text, but it still requires a fixed height container:
Skills
Portfolio
Contacts


-
DV Hacks Mobility Challenge
-
Greener Manhattan Beach
-
Bike to Work 6/21/18
-
Join the Biker Gang
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Clean the Parks
DV Hacks Mobility Challenge
Greener Manhattan Beach
Bike to Work 6/21/18
Join the Biker Gang
Clean the Parks


|
NANO103 BSP V3.01.003
The Board Support Package for Nano103 Series
|
Modules | |
| PWM Exported Functions | |
| #define PWM_CAPSTS_CFIFOV0_Msk |
| #define PWM_CAPSTS_CRIFOV0_Msk |
| #define PWM_CAPTURE_INT_FALLING_LATCH |
| #define PWM_CAPTURE_INT_RISING_LATCH |
| #define PWM_CLKSRC_PWM_CLK |
| #define PWM_CLKSRC_TIMER0 |
| #define PWM_CLKSRC_TIMER1 |
| #define PWM_CLKSRC_TIMER2 |
| #define PWM_CLKSRC_TIMER3 |
| #define PWM_DUTY_INT_DOWN_COUNT_MATCH_CMP |
| #define PWM_DUTY_INT_UP_COUNT_MATCH_CMP |
| #define PWM_EDGE_ALIGNED |
| #define PWM_FB_EDGE_BKP0 |
| #define PWM_FB_EDGE_BKP1 |
| #define PWM_FB_EDGE_SYS_BOD |
| #define PWM_FB_EDGE_SYS_COR |
| #define PWM_FB_LEVEL_BKP0 |
| #define PWM_FB_LEVEL_BKP1 |
| #define PWM_FB_LEVEL_SYS_BOD |
| #define PWM_FB_LEVEL_SYS_COR |
| #define PWM_NF_CLK_DIV_1 |
| #define PWM_NF_CLK_DIV_128 |
| #define PWM_NF_CLK_DIV_16 |
| #define PWM_NF_CLK_DIV_2 |
| #define PWM_NF_CLK_DIV_32 |
| #define PWM_NF_CLK_DIV_4 |
| #define PWM_NF_CLK_DIV_64 |
| #define PWM_NF_CLK_DIV_8 |
| #define PWM_TRIGGER_ADC_EVEN_COMPARE_DOWN_COUNT_POINT |
| #define PWM_TRIGGER_ADC_EVEN_COMPARE_UP_COUNT_POINT |
| #define PWM_TRIGGER_ADC_EVEN_PERIOD_POINT |
| #define PWM_TRIGGER_ADC_EVEN_ZERO_OR_PERIOD_POINT |
| #define PWM_TRIGGER_ADC_EVEN_ZERO_POINT |
| #define PWM_TRIGGER_ADC_ODD_COMPARE_DOWN_COUNT_POINT |
| #define PWM_TRIGGER_ADC_ODD_COMPARE_UP_COUNT_POINT |
| #define PWM_WGCTL0_PRDPCTL0_Msk |
| #define PWM_WGCTL1_CMPDCTL0_Msk |


--- layout: post date: 2006-01-04 time: "09:00:00" authors: ["Greg Wilson"] title: "First Shell Lecture for Software Carpentry is Up" tags: ["Curriculum"] ---
The first lecture on using the shell is up on the new and improved Software Carpentry web site. Comments and feedback would be greatly appreciated.


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There's also an image here: